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  1. Apache MXNet (Retired)
  2. MXNET-1084

Enable FP16 Mode for Integrated TensorRT Inference

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    • Improvement
    • Status: To Do
    • Major
    • Resolution: Unresolved
    • None
    • None

    Description

      As as owner of a Turing, Volta, Pascal, or Jetson TX1 device, I would like to run inference using TensorRT with FP16 DType tensors to make use of dedicated hardware optimizations present.

      Reference: https://devblogs.nvidia.com/tensor-core-ai-performance-milestones/
      https://devblogs.nvidia.com/programming-tensor-cores-cuda-9/

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            Unassigned Unassigned
            kellen.sunderland Kellen Sunderland
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              Created:
              Updated: